Gnu make and linux

Gnu make and linux

GNU Make is a tool which controls the generation of executables and other non-source files of a program from the program’s source files.

Make gets its knowledge of how to build your program from a file called the makefile, which lists each of the non-source files and how to compute it from other files. When you write a program, you should write a makefile for it, so that it is possible to use Make to build and install the program.

Capabilities of Make

  • Make enables the end user to build and install your package without knowing the details of how that is done — because these details are recorded in the makefile that you supply.
  • Make figures out automatically which files it needs to update, based on which source files have changed. It also automatically determines the proper order for updating files, in case one non-source file depends on another non-source file.

As a result, if you change a few source files and then run Make, it does not need to recompile all of your program. It updates only those non-source files that depend directly or indirectly on the source files that you changed.

  • Make is not limited to any particular language. For each non-source file in the program, the makefile specifies the shell commands to compute it. These shell commands can run a compiler to produce an object file, the linker to produce an executable, ar to update a library, or TeX or Makeinfo to format documentation.
  • Make is not limited to building a package. You can also use Make to control installing or deinstalling a package, generate tags tables for it, or anything else you want to do often enough to make it worth while writing down how to do it.
  • Make Rules and Targets

    A rule in the makefile tells Make how to execute a series of commands in order to build a target file from source files. It also specifies a list of dependencies of the target file. This list should include all files (whether source files or other targets) which are used as inputs to the commands in the rule.

    Here is what a simple rule looks like:

    When you run Make, you can specify particular targets to update; otherwise, Make updates the first target listed in the makefile. Of course, any other target files needed as input for generating these targets must be updated first.

    Make uses the makefile to figure out which target files ought to be brought up to date, and then determines which of them actually need to be updated. If a target file is newer than all of its dependencies, then it is already up to date, and it does not need to be regenerated. The other target files do need to be updated, but in the right order: each target file must be regenerated before it is used in regenerating other targets.

    Advantages of GNU Make

    GNU Make has many powerful features for use in makefiles, beyond what other Make versions have. It can also regenerate, use, and then delete intermediate files which need not be saved.

    GNU Make also has a few simple features that are very convenient. For example, the -o file option which says «pretend that source file file has not changed, even though it has changed.» This is extremely useful when you add a new macro to a header file. Most versions of Make will assume they must therefore recompile all the source files that use the header file; but GNU Make gives you a way to avoid the recompilation, in the case where you know your change to the header file does not require it.

    However, the most important difference between GNU Make and most versions of Make is that GNU Make is free software.

    Makefiles And Conventions

    We have developed conventions for how to write Makefiles, which all GNU packages ought to follow. It is a good idea to follow these conventions in your program even if you don’t intend it to be GNU software, so that users will be able to build your package just like many other packages, and will not need to learn anything special before doing so.

    Downloading Make

    Make can be found on the main GNU ftp server: http://ftp.gnu.org/gnu/make/ (via HTTP) and ftp://ftp.gnu.org/gnu/make/ (via FTP). It can also be found on the GNU mirrors; please use a mirror if possible.

    Documentation

    Documentation for Make is available online, as is documentation for most GNU software. You may also find more information about Make by running info make or man make, or by looking at /usr/share/doc/make/, /usr/local/doc/make/, or similar directories on your system. A brief summary is available by running make —help.

    Mailing lists

    Make has the following mailing lists:

    • bug-make is used to discuss most aspects of Make, including development and enhancement requests, as well as bug reports.
    • help-make is for general user help and discussion.

    Announcements about Make and most other GNU software are made on info-gnu (archive).

    Security reports that should not be made immediately public can be sent directly to the maintainer. If there is no response to an urgent issue, you can escalate to the general security mailing list for advice.

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    Getting involved

    Development of Make, and GNU in general, is a volunteer effort, and you can contribute. For information, please read How to help GNU. If you’d like to get involved, it’s a good idea to join the discussion mailing list (see above).

    Test releases Trying the latest test release (when available) is always appreciated. Test releases of Make can be found at http://alpha.gnu.org/gnu/make/ (via HTTP) and ftp://alpha.gnu.org/gnu/make/ (via FTP). Development For development sources, issue trackers, and other information, please see the Make project page at savannah.gnu.org. Translating Make To translate Make’s messages into other languages, please see the Translation Project page for Make. If you have a new translation of the message strings, or updates to the existing strings, please have the changes made in this repository. Only translations from this site will be incorporated into Make. For more information, see the Translation Project. Maintainer Make is currently being maintained by Paul Smith. Please use the mailing lists for contact.

    Licensing

    Make is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version.

    “The Free Software Foundation (FSF) is a nonprofit with a worldwide mission to promote computer user freedom. We defend the rights of all software users.”

    Please send general FSF & GNU inquiries to . There are also other ways to contact the FSF. Broken links and other corrections or suggestions can be sent to .

    For information on coordinating and submitting translations of our web pages, see Translations README. —> Please see the Translations README for information on coordinating and submitting translations of this article.

    Copyright © 2019 Free Software Foundation, Inc.

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    Linux make command

    On Unix-like operating systems, make is a utility for building and maintaining groups of programs (and other types of files) from source code.

    This page covers the GNU/Linux version of make.

    Description

    The purpose of the make utility is to determine automatically which pieces of a large program need to be re-compiled, and issue the commands necessary to recompile them. This documentation describes the GNU implementation of make, which was written by Richard Stallman and Roland McGrath, and is currently maintained by Paul Smith. Many of the examples listed below show C programs, since they are most common, but you can use make with any programming language whose compiler can be run with a shell command. In fact, make is not limited to programs. You can use it to describe any task where some files must be updated automatically from others whenever the others change.

    To prepare to use make, you must write a file called the makefile that describes the relationships among files in your program, and the states the commands for updating each file. In a program, typically the executable file is updated from object files, which are in turn made by compiling source files.

    Once a suitable makefile exists, each time you change some source files, this simple shell command:

    suffices to perform all necessary recompilations. The make program uses the makefile data base and the last-modification times of the files to decide which of the files need to be updated. For each of those files, it issues the commands recorded in the database.

    make executes commands in the makefile to update one or more target names, where name is typically a program. If no -f option is present, make will look for the makefiles GNUmakefile, makefile, and Makefile, in that order.

    Normally you should call your makefile either makefile or Makefile. (The officially recommended name is Makefile because it appears prominently near the beginning of a directory listing, right near other important files such as README.) The first name checked, GNUmakefile, is not recommended for most makefiles. You should use this name if you have a makefile that is specific to GNU make, and will not be understood by other versions of make. If makefile is a dash (««), the standard input is read.

    make updates a target if it depends on prerequisite files that have been modified since the target was last modified, or if the target does not exist.

    Syntax

    Options

    -b, -m These options are ignored, but included for compatibility with other versions of make.
    -B, —always-make Unconditionally make all targets.
    -C dir, —directory=dir Change to directory dir before reading the makefiles or doing anything else. If multiple -C options are specified, each is interpreted relative to the previous one: -C / -C etc is equivalent to -C /etc. This is typically used with recursive invocations of make.
    -d Print debugging information in addition to normal processing. The debugging information says which files are being considered for remaking, which file-times are being compared and with what results, which files actually need to be remade, which implicit rules are considered and that are applied; everything interesting about how make decides what to do.
    —debug[=FLAGS] Print debugging information in addition to normal processing. If the FLAGS are omitted, then the behavior is the same as if -d was specified. FLAGS may be a for all debugging output (same as using -d), b for basic debugging, v for more verbose basic debugging, i for showing implicit rules, j for details on invocation of commands, and m for debugging while remaking makefiles.
    -e,
    —environment-overrides
    Give variables taken from the environment precedence over variables from makefiles.
    -f file, —file=file,
    —makefile=file
    Use file as a makefile.
    -i, —ignore-errors Ignore all errors in commands executed to remake files.
    -I dir, —include-dir=dir Specifies a directory dir to search for included makefiles. If several -I options are used to specify several directories, the directories are searched in the order specified. Unlike the arguments to other flags of make, directories given with -I flags may come directly after the flag: -Idir is allowed, as well as -I dir. This syntax is allowed for compatibility with the C preprocessor’s -I flag.
    -j [jobs], —jobs[=jobs] Specifies the number of jobs (commands) to run simultaneously. If there is more than one -j option, the last one is effective. If the -j option is given without an argument, make will not limit the number of jobs that can run simultaneously.
    -k, —keep-going Continue as much as possible after an error. While the target that failed (and those that depend on it) cannot be remade, the other dependencies of these targets can be processed all the same.
    -l [load],
    —load-average[=load]
    Specifies that no new jobs (commands) should be started if there are others jobs running and the load average is at least load (a floating-point number). With no argument, removes a previous load limit.
    -L,
    —check-symlink-times
    Use whichever is the latest modification time between symlinks and target.
    -n, —just-print,
    —dry-run, —recon
    Print the commands that would be executed, but do not execute them.
    -o file, —old-file=file,
    —assume-old=file
    Do not remake the file file even if it is older than its dependencies, and do not remake anything on account of changes in file. Essentially the file is treated as very old and its rules are ignored.
    -p, —print-data-base Print the database (rules and variable values) that results from reading the makefiles; then execute as usual or as otherwise specified. This also prints the version information given by the -v switch (see below). To print the database without trying to remake any files, use make -p -f/dev/null.
    -q, —question «Question mode.» Do not run any commands, or print anything; just return an exit status that is zero if the specified targets are already up to date, nonzero otherwise.
    -r, —no-builtin-rules Eliminate use of the built-in implicit rules. Also, clear out the default list of suffixes for suffix rules.
    -R, —no-builtin-variables Don’t define any built-in variables.
    -s, —silent, —quiet Silent operation; do not print the commands as they are executed.
    -S, —no-keep-going,
    —stop
    Cancel the effect of the -k option. This is never necessary except in a recursive make where -k might be inherited from the top-level make via MAKEFLAGS or if you set -k in MAKEFLAGS in your environment.
    -t, —touch Touch files (mark them up to date without really changing them) instead of running their commands. This is used to pretend that the commands were done, to fool future invocations of make.
    -v, —version Print the version of make; also a Copyright, a list of authors and a notice that there is no warranty.
    -w, —print-directory Print a message containing the working directory before and after other processing. This may be useful for tracking down errors from complicated nests of recursive make commands.
    —no-print-directory Turn off -w, even if it was turned on implicitly.
    -W file, —what-if=file,
    —new-file=file,
    —assume-new=file
    Pretend that the target file has just been modified. When used with the -n flag, this shows you what would happen if you were to modify that file. Without -n, it is almost the same as running a touch command on the given file before running make, except that the modification time is changed only internally within make.
    —warn-undefined-variables Warn when an undefined variable is referenced.
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    Typical Use

    make is typically used to build executable programs and libraries from source code. Generally speaking, make is applicable to any process that involves executing arbitrary commands to transform a source file to a target result. For example, make could be used to detect a change made to an image file (the source) and the transformation actions might be to convert the file to some specific format, copy the result into a content management system, and then send e-mail to a predefined set of users that the above actions were performed.

    make is invoked with a list of target file names to build as command-line arguments:

    Without arguments, make builds the first target that appears in its makefile, which is traditionally a target named all.

    make decides whether a target needs to be regenerated by comparing file modification times. This solves the problem of avoiding the building of files that are already up to date, but it fails when a file changes but its modification time stays in the past. Such changes could be caused by restoring an older version of a source file, or when a network filesystem is a source of files and its clock or timezone is not synchronized with the machine running make. The user must handle this situation by forcing a complete build. Conversely, if a source file’s modification time is in the future, it may trigger unnecessary rebuilding.

    Makefiles

    make searches the current directory for the makefile to use. GNU make searches files for a file named one of GNUmakefile, makefile, and then Makefile, and runs the specified target(s) from that file.

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    The makefile language is similar to declarative programming, in which necessary end conditions are described but the order in which actions are to be taken is not important. This may be confusing to programmers used to imperative programming, which explicitly describes how the end result will be reached.

    One problem in build automation is the tailoring of a build process to a given platform. For instance, the compiler used on one platform might not accept the same options as the one used on another. This is not well handled by make on its own. This problem is typically handled by generating separate platform-specific build instructions, which in turn may be processed by make. Common tools for this process are autoconf and cmake.

    Rules

    A makefile essentially consists of rules. Each rule begins with a dependency line which defines a target followed by a colon («:«) and optionally an enumeration of components (files or other targets) on which the target depends. The dependency line is arranged so that the target (left hand of the colon) depends on components (right hand of the colon). It is common to refer to components as prerequisites of the target.

    Here, is the tab character. Usually each rule has a single unique target, rather than multiple targets.

    For example, a C .o object file is created from .c files, so .c files come first (i.e. specific object file target depends on a C source file and header files). Because make itself does not understand, recognize or distinguish different kinds of files, this opens up the possibility for human error. A forgotten or an extra dependency may not be immediately obvious and may result in subtle bugs in the generated software. It is possible to write makefiles which generate these dependencies by calling third-party tools, and some makefile generators, such as the GNU automake toolchain, can do so automatically.

    After each dependency line, a series of command lines may follow which define how to transform the components (usually source files) into the target (usually the «output»). If any of the components have been modified, the command lines are run.

    With GNU make, the first command may appear on the same line after the prerequisites, separated by a semicolon:

    Each command line must begin with a tab character to be recognized as a command. The tab is a whitespace character, but the space character does not have the same special meaning. This is problematic, since there may be no visual difference between a tab and a series of space characters. This aspect of the syntax of makefiles is often subject to criticism, and is important to take note.

    However, GNU make (since version 3.82) allows the user to choose any symbol (one character) as the recipe prefix using the .RECIPEPREFIX special variable, for example:

    Each command is executed by a separate shell or command-line interpreter instance. Since operating systems use different command-line interpreters this can lead to unportable makefiles. For instance, GNU make by default executes commands with /bin/sh, which is the shell where Unix commands like cp are normally used.

    A rule may have no command lines defined. The dependency line can consist solely of components that refer to targets, for example:

    The command lines of a rule are usually arranged so that they generate the target. An example: if «file.html» is newer, it is converted to text. The contents of the makefile:

    The above rule would be triggered when make updates «file.txt«.

    In the following invocation, make would typically use this rule to update the «file.txt» target if «file.html» were newer:

    Command lines can have one or more of the following three prefixes:

    • a hyphen-minus (), specifying that errors are ignored
    • an at sign (@), specifying that the command is not printed to standard output before it is executed
    • a plus sign (+), the command is executed even if make is invoked in a «do not execute» mode

    Ignoring errors and silencing all echo output can also be obtained via the special targets «.IGNORE» and «.SILENT«, respectively.

    Macros

    A makefile can contain definitions of macros. Macros are usually referred to as variables when they hold simple string definitions, like «CC=clang«, which would specify clang as the C compiler. Macros in makefiles may be overridden in the command-line arguments passed to the make utility. environment variables are also available as macros.

    Macros allow users to specify the programs invoked and other custom behavior during the build process. For example, as just shown, the macro «CC» is frequently used in makefiles to refer to the location of a C compiler.

    New macros are traditionally defined using capital letters:

    A macro is used by expanding it. Traditionally this is done by enclosing its name inside $(). An equivalent form uses curly braces rather than parenthesis, i.e. $<>, which is the style used in BSD operating systems.

    Macros can be composed of shell commands using the command substitution operator, denoted by backticks («` `«).

    The content of the definition is stored «as is». Lazy evaluation is used, meaning that macros are normally expanded only when their expansions are actually required, such as when used in the command lines of a rule. For example:

    The generic syntax for overriding macros on the command line is:

    Makefiles can access any of a number of predefined internal macros, with «?» and «@» being the most common.

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