Icarus verilog windows 10

What Is Icarus Verilog?

The compiler proper is intended to parse and elaborate design descriptions written to the IEEE standard IEEE Std 1364-2005. This is a fairly large and complex standard, so it will take some time to fill all the dark alleys of the standard, but that’s the goal.

Icarus Verilog is a work in progress, and since the language standard is not standing still either, it probably always will be. That is as it should be. However, I will make stable releases from time to time, and will endeavor to not retract any features that appear in these stable releases. The quick links above will show the current stable release.

The main porting target is Linux, although it works well on many similar operating systems. Various people have contributed precompiled binaries of stable releases for a variety of targets. These releases are ported by volunteers, so what binaries are available depends on who takes the time to do the packaging. Icarus Verilog has been ported to That Other Operating System, as a command line tool, and there are installers for users without compilers. You can compile it entirely with free tools, too, although there are precompiled binaries of stable releases.

Where is Icarus Verilog?

Development snapshots are made fairly often, and made available in the FTP directory . The files are gzip compressed tar files that contain the source and makefiles. These snapshots follow development progress, and, although the latest features are included in this source, compatibility from snapshot to snapshot is not guaranteed.

And finally, the current «git» repository is available for read-only access via anonymous git cloning. This allows for those who which to track my progress and contribute with patches timely access to the most bleeding edge copy of the source. Access the git repository of Icarus Verilog with the commands:

From here, you can use normal git commmands to update your source to the very latest copy of the source. See the Installation Guide for details on how to access and compile the git repository.

A Test Suite?

There is also a test suite available. The test suite is also accessible as the ivtest github.com project, available here: . Access the git repository of the test suite with the command:

Since the test suite is simply an ongoing accumulation of tests, there are not typically any releases, per se. Only the git source.

Who is Icarus Verilog?

There is also a cast of characters who have contributed patches, tests, and various bits to the project. See the git logs to get an idea of the breadth of the contributor base. I’ll be adding a credits page someday, although the source distributions do in general name names.

The mailing lists for Icarus Verilog are hosted by sourceforge.net, so go there for mailing list archives and instructions on joining; but it is often discussed in the gEDA mailing lists as well. See the gEDA home page for information about that project, and information about how to join the mailing list. While you are browsing the gEDA web site, notice all the other nifty EDA related tools that are there. While Icarus Verilog is not literally part of the gEDA project, we cooperate and try to support each other. Icarus Verilog users are often gEDA users as well.

Симуляция проекта с помощью Icarus-Verilog

После некоторых раздумий я решил написать статью о симуляции Verilog проектов с помощью пакета программ icarus-verilog . Мне кажется, что это лучший способ «быстро попробовать» возможности симуляции. Конечно, среда симуляции ModelSim компании Mentor Graphics (или ModelSim-Altera Edition) — это мощное средство, но освоить ее несколько труднее.

Сейчас мы быстренько скачаем из интернета icarus-verilog , установим его и попробуем что нибудь просимулировать.

Первое, что нужно сделать – это посетить сайт http://www.icarus.com/eda/verilog/ — отправная точка для изучения Icarus Verilog . Это свободный проект, то есть при желании можно даже посмотреть исходные тексты всех программ, и компилятора и симулятора Verilog . Здесь есть ссылки на документацию и откуда скачивать файлы для установки. Конечно, есть пакеты программ и для Linux и для Windows.

Оттуда я перехожу по ссылке Pablo Bleyer Kocik’s Icarus Verilog Windows packages (off-site), которая ведет меня на станицу скачивания программы для операционной системы Windows. Вы будете приятно удивлены – размер файла для скачивания составляет около 6 мегабайт! Для ModelSim , например, размер будет более 500Мб!

Выкачиваем и устанавливаем!
По умолчанию программа устанавливается в папку c:\iverilog и установщик сам прописывает пути к исполняемым файлам.

В этой же папке есть несколько коротких но понятных инструкций, как пользоваться компилятором и симулятором (правда на английском языке).

Теперь напишем 2 модуля на языке Verilog :

1. Модуль 8-ми битный счетчик с возможностью загрузки.
2. Тестбенч – модуль для тестирования первого модуля счетчика.

Для чего применяется такая методика из раздельных модулей – тестируемого и тестирующего? Первый модуль – это тот, который мы в будущем хотим компилировать для чипа. Для него важно быть простым и компактным. А второй модуль, тестирующий (их называют testbench ) моделирует внешние сигналы, которые подаются на тестируемый модуль и проверяет выходные сигналы из него.

Тут надо заметить, что написание тестбенчей – это в каком-то смысле искуство. Получается мы пишем программу, модуль. Для тестирования этой программы мы пишем вторую программу – модуль тестбенч. Мы можем ошибиться как в первой программе, так и во второй или в обеих сразу! Ведь в любой программе возможны баги. Разработчик может думать, что он все сделал правильно и просимулировал и увидел результат какой хотел, но на самом деле проект может остаться неработоспособным Но не нужно пугаться. Будем двигаться дальше.

Итак, вот мой счетчик, тестируемый модуль:

module counter (
input wire reset,
input wire clk,
input wire [7:0]wdata,
input wire wr,
output reg [7:0]data
);
always @ ( posedge clk or posedge reset)
if (reset)
data else
if (wr)
begin
data end
else
data endmodule

А вот тестбенч, тестирующий модуль. Чтобы он был более понятным пожалуйста прочитайте предыдущую статью про System Tasks.

reg reset, clk, wr;
reg [7:0]wdata;
wire [7:0] data_cnt;

//устанавливаем экземпляр тестируемого модуля
counter counter_inst(reset, clk, wdata, wr, data_cnt);

//моделируем сигнал тактовой частоты
always
#10 clk =

//от начала времени.

initial
begin
clk = 0;
reset = 0;
wdata = 8’h00;
wr = 1’b0;

//через временной интервал «50» подаем сигнал сброса
#50 reset = 1;

//еще через время «4» снимаем сигнал сброса

//пауза длительностью «50»
#50;

//ждем фронта тактовой частоты и сразу после нее подаем сигнал записи
@( posedge clk)
#0
begin
wdata = 8’h55;
wr = 1’b1;
end

//по следующему фронту снимаем сигнал записи
@( posedge clk)
#0
begin
wdata = 8’h00;
wr = 1’b0;
end
end

//заканчиваем симуляцию в момент времени «400»
initial
begin
#400 $finish;
end

//создаем файл VCD для последующего анализа сигналов
initial
begin
$dumpfile(«out.vcd»);
$dumpvars(0,test_counter);
end

//наблюдаем на некоторыми сигналами системы
initial
$monitor($stime,, reset,, clk. wdata,, wr,, data_cnt);

Icarus-verilog может скомпилировать их в свой «исполняемый» формат. Для этого в командной строке набираем команду:

>iverilog -o qqq counter.v tcounter.v

Iverilog – это компилятор, который транслирует исходный код Verilog в файл специального формата для симуляции проекта, или в файлы других форматов netlist для последующей обработки другими программами.

После выполнения этой команды у нас появился новый файл «qqq». Мы будем использовать его для симуляции. Запускаем в командной строке симулятор из комплекта icarus-verilog :

>vvp qqq

Вот мы и видим весь вывод симулятора на консоль:

Здесь видно, как значение счетчика увеличивается с каждым фронтом сигнала clk .
Видно, что до возникновения сигнала reset значение счетчика неопределено.
Видно, что в момент времени «110» устанавливается сигнал wr , а в момент времени «130» происходить запись нового значения в счетчик.

Если вы теперь захотите увидеть сигналы в графическом виде, то это тоже возможно. В результате симуляции у нас появился новый файл «out.vcd» — это Value Change Dump File . Для его просмотра есть инструмент gtkwave . Он есть здесь же в комплекте установленного нами icarus-verilog .

Набираем в командной строке:

>gtkwave out.vcd

И появляется вот такое окно (кликните на картинку, чтобы увеличить ее):

Слева есть окошко со списком сигналов проекта. Нужно выбрать необходимые сигналы и добавить их к просмотру кнопкой » Append «.
Справа – окно графического представления сигналов. Можно менять масштаб просмотра и скролировать вдоль шкалы времени.

Вот так можно проводить функциональную симуляцию проектов написаных на языке Verilog .

Icarus Verilog

Icarus Verilog – компилятор языка описания аппаратуры Verilog. Он поддерживает версии 1995, 2001 и 2005, частично SystemVerilog и некоторые расширения. Используется для симуляции и верификации проектов. Кроме того, в версиях с 0.2 по 0.8 мог использоваться для синтеза (в формат XNF), для ПЛИС Xilinx.

Icarus Verilog доступен для OpenSolaris x86, FreeBSD, Linux, AIX, Microsoft Windows и Mac OS X. Выпускается под лицензией GNU General Public License.

Программа Icarus Verilog имеет возможность подключения модулей расширения симуляции и кодогенерации.

Симуляция выполняется виртуальной машиной. Результаты симуляции записываются в стандартном формате VCD (англ. Value Change Dump – дамп изменения значений), для просмотра результатов симуляции в виде графиков сигналов необходима соответствующая программа, например, GTKWave.

Состав пакета Icarus Verilog

Пакет Icarus Verilog состоит из следующих основных программ:

Собственно препроцессор и компилятор языка Verilog. Выполняет трансляцию исходного кода на Verilog в файл программы моделирования или в перечень связей (netlist) для дальнейшей обработки.

Виртуальная машина, которая выполняет программу моделирования, созданную компилятором iverilog.

Утилита для упрощения компиляции модулей VPI. Принимает на входе список файлов исходных текстов на языках C, C + + и объектных файлов, на выходе выдаёт собранный vpi-модуль.

Также в пакет входит набор программ конвертации форматов vcd2fst, vcd2lxt, vcd2lxt2, vcd2vzt, vzt2vcd, vztminer, lxt2miner и lxt2vcd.

Installation Guide

Icarus may be installed from source code or from pre-packaged binary distributions.

Contents

Installation From Source [ edit | edit source ]

Icarus is developed for Unix-like environments but can also be compiled on Windows systems using the Cygwin environment or MinGW compilers. The following instructions are the common steps for obtaining the Icarus Verilog source, compiling and installing. Note that there are precompiled and/or prepackaged versions for a variety of systems, so if you find an appropriate packaged version, then that is the easiest way to install.

Obtaining Snapshots [ edit | edit source ]

The ftp site for the latest snapshot is ftp://ftp.icarus.com/pub/eda/verilog. Download a tarball with a name such as verilog-version.tar.gz and un-tar it using:

This will create a directory, similar to the name of the tarball, such as verilog-version. Change into this directory using:

The source is then compiled and installed in the manner appropriate for your operating system. See below.

Obtaining Source From git [ edit | edit source ]

Note: Icarus Verilog uses github to host the source code. If you do not yet have git installed on your system, go to github.com (or see the package repository for your Linux distribution) for current git software.

The source code for Icarus is stored under the git source code control system. You can use git to get the latest development head or the latest of a specific branch. Stable releases are placed on branches, and in particular v11 stable releases are on the branch «v11-branch» To get the development version of the code follow these steps:

The first two lines are optional and are used to tell git who you are. This information is important if/when you submit a patch. We suggest that you add this information now so you don’t forget to do it later. The clone will create a directory, named iverilog, containing the source tree, and will populate that directory with the most current source from the HEAD of the repository.

Change into this directory using:

Normally, this is enough as you are now pointing at the most current development code, and you have implicitly created a branch «master» that tracks the development head. However, If you want to actually be working on the v11-branch (the branch where the latest v11 patches are) then you checkout that branch with the command:

This creates a local branch that tracks the v11-branch in the repository, and switches you over to your new v11-branch. The tracking is important as it causes pulls from the repository to re-merge your local branch with the remote v11-branch. You always work on a local branch, then merge only when you push/pull from the remote repository.

(The v11-branch is the current code for the v11 release series. See the GIT Branch Summary for more about the branches that are available, and more about how to work with branches.)

Now that you’ve cloned the repository and optionally selected the branch you want to work on, your local source tree may later be synced up with the development source by using the git command:

The git system remembers the repository that it was cloned from, so you don’t need to re-enter it when you pull.

Finally, configuration files are built by the extra step:

The source is then compiled as appropriate for your system. See the specific build instructions below for your operation system for what to do next.

You will need autoconf and gperf installed in order for the script to work. If you get errors such as:

You will need to install download and install the autoconf and gperf tools.

Icarus Specific Configuration Options [ edit | edit source ]

Icarus takes many of the standard configuration options and those will not be described here. The following are specific to Icarus:

This option allows the user to build Icarus with a default suffix or when provided a user defined suffix. Older stable releases have this flag on by default e.g.(V0.8 by default will build with a «-0.8» suffix). All versions have an appropriate default suffix («- «).

All programs or directories are tagged with this suffix. e.g.(iverilog-0.8, vvp-0.8, etc.). The output of iverilog will reference the correct run time files and directories. The run time will check that it is running a file with a compatible version e.g.(you can not run a V0.9 file with the V0.8 run time).

This option adds extra memory cleanup code and pool management code to allow better memory leak checking when valgrind is available. This option is not need when checking for basic errors with valgrind.

Compiling on Linux/Unix [ edit | edit source ]

(Note: You will need to install bison, flex, g++ and gcc) This is probably the easiest case. Given that you have the source tree from the above instructions, the compile and install is generally as simple as:

The «make install» typically needs to be done as root so that it can install in directories such as «/usr/local/bin» etc. You can change where you want to install by passing a prefix to the «configure» command:

This will configure the source for eventual installation in the directory that you specify. Note that «rpm» packages of binaries for Linux are typically configured with «—prefix=/usr» per the Linux File System Standard.

Make sure you have the latest version of flex otherwise you will get an error when parsing lexor.lex. To allow configure to pick up your version of flex, set the environment variable $LEX

building on ubuntu 12.xx: «configure: error: C++ preprocessor «/lib/cpp» fails sanity check» then «sudo apt-get install build-essential» and then rerun ./configure

Compiling on Macintosh OS X [ edit | edit source ]

Since Mac OS X is a BSD flavor of Unix, you can install Icarus Verilog from source using the procedure described above. You need to install the Xcode software, which includes the C and C++ compilers for Mac OS X. The package is available for free download from Apple’s developer site. Once Xcode is installed, you can build Icarus Verilog in a terminal window just like any other Unix install.

For versions newer than 10.3 the GNU Bison tool (packaged with Xcode) needs to be updated to version 3.

Icarus Verilog is also available through the Homebrew package manager: «brew install icarus-verilog».

Compiling on Solaris [ edit | edit source ]

Solaris is a form of Unix, so the Unix instructions above generally apply. However, a Solaris user will need to install some other compilation tools:

Solaris includes a BSD-style make, but Icarus Verilog uses some GNU make extensions. It is conventional on a Solaris system to install GNU make as «gmake».

As of June, 2010 Icarus stable (V0.9) and development from the git archives can be compiled with the SunStudio compilers. This was tested using OpenSolaris 2009.06 and the 12.1 version of SunStudio.

These tools are gnu replacements for yacc/lex. They are extended versions of their older counterparts.

These tools are commonly available for Solaris. (SUN used to distribute a CD that included these and other GNU tools precompiled and prepackaged. Can anybody confirm that they still have such a disk?)

Compiling on MS Windows (MinGW) [ edit | edit source ]

The source as available above can also be compiled on MS Windows systems. The preferred method for compiling on Windows is to use the MinGW-w64 compiler, as described in detail here. Be warned, compiling for Windows is somewhat painful (mainly because you also have to set up a compilation environment), although using the MSYS2 build environment with the appropriate tools allows Icarus to be built like Linux/Unix.

When built using the MinGW-w64 compiler, you can run Icarus Verilog either from a Windows command shell window or from a MinGW shell window.

Note: You will need to start a new shell to pick up any changes you have made to the «PATH» environment variable.

Note: If you use a MinGW shell, be aware that by default MSYS2 uses the mintty terminal emulator, which has the annoying artefact that it fully buffers all output to stdout. You can use the vvp -i option to overcome this when running simulations.

The iverilog.pdf, iverilog-vpi.pdf, and vvp.pdf files document the main commands. View these with Acrobat reader, or any other viewer capable of displaying PDF format files.

Compiling on MS Windows (Cygwin) [ edit | edit source ]

Cygwin users should preferably use the Mingw method to compile Icarus Verilog. Programs compiled by Mingw are perfectly usable under Cygwin, like any other Windows binary, so Mingw builds are the preferred distribution form. However, there are practical reasons to compile directly under Cygwin: file path handling and fully compatible test suite output.

Be warned that the Cygwin binary is noticeably slower than the Mingw compiled binary, so there is a trade off of compatibility vs speed of simulation.

In a Cygwin command line follow the instructions for Linux/Unix. The instructions are the same, as Cygwin is an attempt to be Unix under Windows.

In order to compile/install Icarus using Cygwin the following packages must be installed:

binutils, g++, autoconf, automake, make, flex, bison, gperf, libbz2-devel (otherwise system.vpi won’t build)

They should all be available via the Cygwin setup program.

The ghostscript package (to get ps2pdf) is optional, but since Cygwin has a working «man» system, the man pages will be installed into a Cygwin system and ps2pdf is not required.

Installation From Premade Packages [ edit | edit source ]

The various operation systems and distributions have various package management systems, and there are prepackaged distributions of Icarus Verilog available for some of them. If there is a prepackaged version that is suitable for your system and needs, then prepackaged installs are the easiest.

RPM Based Systems [ edit | edit source ]

On systems that use RPM Package Manager (RPM) software packages, Icarus Verilog may be installed from a binary RPM package. If no binary RPM package is available for your system, then one can be easily made from a source RPM package.

Building a Binary RPM Package [ edit | edit source ]

Source RPM packages are generally available at the same site where the source tarballs are hosted, and have the suffix «.src.rpm». Once downloaded, a binary RPM package can be built using:

(Older RPM Based Systems that do not have rpmbuild use rpm to build the binary packages.)

This compiles the source RPM package and makes a binary RPM package tailored for your system. The generated package is placed where you configured rpm to place built packages: often «/usr/src/rpm/RPMS». (NOTE: Building packages may require that you include other packages (notably -devel packages) that are not otherwise needed.)

Installing a Binary RPM Package [ edit | edit source ]

Binary RPM packages, downloaded or built using the instructions above, can be installed with the following command (run as root):

If you are using yum (Yellow dog Updater) as your RPM package updater/installer/remover, then you can install a downloaded or built binary RPM package with the following command (run as root):

SuSE Linux/openSUSE [ edit | edit source ]

The openSUSE build service has now a web interface that allows to search for packages. To find Icarus Verilog packages go to the web page http://software.opensuse.org/search, select your version of the distribution and enter the search term verilog. Starting with openSUSE 10.3 the distribution supports a 1-Click install feature, allowing to start the installation by selecting the 1-Click link on the web page. The 1-Click install feature will add the repository as to the list of installation sources.

If you have an older version and not the 1-Click install feature installed, you can add the repository manually to your install source by following the instructions at the openSUSE web site.

Stable Version [ edit | edit source ]

Prepackaged versions of the Icarus Verilog stable releases are available via the openSUSE build service. Simply browse to software.opensuse.org, search for verilog, and click the install button for the version you wish to install.

Development Snapshot [ edit | edit source ]

Any development snapshots available prepackaged for openSUSE should be available at the openSUSE build service site.

Ubuntu Linux [ edit | edit source ]

This needs testing! See the discussion tab.

The Ubuntu Universe repository has the Icarus Verilog .deb package. To install Icarus Verilog follow the steps below

• Add the Universe repository in /etc/apt/sources.list using your favourite text editor (It would already be there but would have been commented). In Edgy Eft,the line would be something like

• Run sudo apt-get update from terminal.
• Run sudo apt-get install verilog

Installing version 0.9.1 from a launchpad PPA repository on Intrepid and Jaunty [ edit | edit source ]

Edit the list of available repositories (sudo access password required)

and add the new repository (change the distribution name as appropriate)

Add the repository key to the system to avoid warnings

Update the local repository cache

Install (update) the Icarus Verilog package

Installing version 0.9.x from a PPA on Karmic, Lucid, Maverick, Natty, Oneiric, Precise, . [ edit | edit source ]

Add a new ppa (sudo access password required)

Update the local repository cache

Install (update) the Icarus Verilog package

Optionally install (update) the GTKWave package

Centos Linux [ edit | edit source ]

For centos 6 the installation is very easy:

yum install iverilog

and then type «y» when you are asked to confirm

Macintosh OS X [ edit | edit source ]

Icarus Verilog can be easily installed on Mac OS using MacPorts, Homebrew or Fink.

MacPorts [ edit | edit source ]

Instructions for downloading and installing MacPorts can be found here. Once MacPorts is installed and led via MacPorts:

Homebrew [ edit | edit source ]

Instructions for downloading and installing Homebrew can be found here. Once Homebrew is installed and configured, Icarus Verilog can be installed in a terminal window using:

Fink [ edit | edit source ]

Instructions for downloading and installing Fink can be found here.

FreeBSD [ edit | edit source ]

Icarus Verilog can be used without a problem on FreeBSD-based systems. It is very simple to install and get it working. The fastest way is to use FreeBSD Ports collection.

FreeBSD Ports [ edit | edit source ]

FreeBSD Ports collection includes Icarus Verilog as a port of it’s base package. FreeBSD Ports collection normally is put under /usr/ports hierarchy.

Installation (as root—unless you’ve done some customization):

Now, you should be able to use «iverilog». If you use csh(1) shell, remember to type:

In case of having no /usr/ports directory, you’ll have to fetch it by yourself. The easiest way is to copy /usr/share/examples/cvsup/ports-supfile to some other location:

Edit this file to change «CHANGE_THIS.FreeBSD.org» to appropriate FreeBSD mirror, and start downloading:

This will take some time and disk space. It’s about downloading all Ports. For more information, visit FreeBSD Handbook, especially Installing Applications: Packages and Ports section.

Windows [ edit | edit source ]

MSYS2 [ edit | edit source ]

Icarus Verilog is available in official MSYS2 repositories and mirrors: https://packages.msys2.org/search?t=pkg&q=iverilog

First, search the available package versions:

Then, install the package for MINGW64 and/or MINGW32:

Installers [ edit | edit source ]

Windows binaries wrapped in a handy installer are available from Pablo Bleyer Kocik’s page «Icarus Verilog for Windows». This page makes available installers mainly for the most recent stable versions. Simply download the version of choice and execute the installer.