Linux processor microcode data file

Microcode

Processor manufacturers release stability and security updates to the processor microcode. These updates provide bug fixes that can be critical to the stability of your system. Without them, you may experience spurious crashes or unexpected system halts that can be difficult to track down.

All users with an AMD or Intel CPU should install the microcode updates to ensure system stability.

Microcode updates are usually shipped with the motherboard’s firmware and applied during firmware initialization. Since OEMs might not release firmware updates in a timely fashion and old systems do not get new firmware updates at all, the ability to apply CPU microcode updates during boot was added to the Linux kernel. The Linux microcode loader supports three loading methods:

1. Early loading updates the microcode very early during boot, before the initramfs stage, so it is the preferred method. This is mandatory for CPUs with severe hardware bugs, like the Intel Haswell and Broadwell processor families.
2. Late loading updates the microcode after booting which could be too late since the CPU might have already tried to use a bugged instruction set. Even if already using early loading, late loading can still be used to apply a newer microcode update without needing to reboot.
3. Built-in microcode can be compiled into the kernel that is then applied by the early loader.

Contents

Early loading

Installation

Depending on the processor, install the following package:

Microcode must be loaded by the boot loader. Because of the wide variability in users’ early-boot configuration, microcode updates may not be triggered automatically by Arch’s default configuration. Many AUR kernels have followed the path of the official Arch kernels in this regard.

These updates must be enabled by adding /boot/amd-ucode.img or /boot/intel-ucode.img as the first initrd in the bootloader config file. This is before the normal initrd file. See below for instructions for common bootloaders.

In the following sections replace cpu_manufacturer with your CPU manufacturer, i.e. amd or intel .

Configuration

This article or section needs expansion.

Enabling early microcode loading in custom kernels

In order for early loading to work in custom kernels, «CPU microcode loading support» needs to be compiled into the kernel, not compiled as a module. This will enable the «Early load microcode» prompt which should be set to Y .

grub-mkconfig will automatically detect the microcode update and configure GRUB appropriately. After installing the microcode package, regenerate the GRUB config to activate loading the microcode update by running:

Alternatively, users that manage their GRUB config file manually can add /boot/cpu_manufacturer-ucode.img (or /cpu_manufacturer-ucode.img if /boot is a separate partition) as follows:

Repeat it for each menu entry.

systemd-boot

Use the initrd option to load the microcode, before the initial ramdisk, as follows:

The latest microcode cpu_manufacturer-ucode.img must be available at boot time in your EFI system partition (ESP). The ESP must be mounted as /boot in order to have the microcode updated every time amd-ucode or intel-ucode is updated. Otherwise, copy /boot/cpu_manufacturer-ucode.img to your ESP at every update of the microcode package.

Unified kernel images

For unified kernel images, first generate the initrd to integrate by creating a new one as follows:

EFISTUB

Append two initrd= options:

rEFInd

Edit boot options in /boot/refind_linux.conf and add initrd=boot\cpu_manufacturer-ucode.img (or initrd=cpu_manufacturer-ucode.img if /boot is a separate partition) as the first initramfs. For example:

Users employing manual stanzas in esp/EFI/refind/refind.conf to define the kernels should simply add initrd=boot\cpu_manufacturer-ucode.img (or initrd=cpu_manufacturer-ucode.img if /boot is a separate partition) as required to the options line, and not in the main part of the stanza. E.g.:

Syslinux

Multiple initrd’s can be separated by commas in /boot/syslinux/syslinux.cfg :

LILO and potentially other old bootloaders do not support multiple initrd images. In that case, cpu_manufacturer-ucode.img and initramfs-linux.img will have to be merged into one image.

To merge both images into one image named initramfs-merged.img , the following command can be used:

Now, edit /etc/lilo.conf to load the new image.

And run lilo as root:

Late loading

Late loading of microcode updates happens after the system has booted. It uses files in /usr/lib/firmware/amd-ucode/ and /usr/lib/firmware/intel-ucode/ .

For AMD processors the microcode update files are provided by linux-firmware .

For Intel processors no package provides the microcode update files (FS#59841). To use late loading you need to manually extract intel-ucode/ from Intel’s provided archive.

Enabling late microcode updates

Unlike early loading, late loading of microcode updates on Arch Linux are enabled by default using /usr/lib/tmpfiles.d/linux-firmware.conf . After boot the file gets parsed by systemd-tmpfiles-setup.service(8) and CPU microcode gets updated.

To manually reload the microcode, e.g. after updating the microcode files in /usr/lib/firmware/amd-ucode/ or /usr/lib/firmware/intel-ucode/ , run:

This allows to apply newer microcode updates without rebooting the system. For linux-firmware you can automate it with a pacman hook, e.g.:

Disabling late microcode updates

For AMD systems the CPU microcode will get updated even if amd-ucode is not installed since the files in /usr/lib/firmware/amd-ucode/ are provided by the linux-firmware package (FS#59840).

For virtual machines and containers (FS#46591) it is not possible to update the CPU microcode, so you may want to disable microcode updates. To do so, you must override the tmpfile /usr/lib/tmpfiles.d/linux-firmware.conf that is provided by linux-firmware . It can be done by creating a file with the same filename in /etc/tmpfiles.d/ :

Verifying that microcode got updated on boot

Check the kernel messages with journalctl to see if the microcode has been updated:

On Intel systems one should see something similar to the following on every boot, indicating that microcode is updated very early on:

It is entirely possible, particularly with newer hardware, that there is no microcode update for the CPU. In that case, the output may look like this:

On AMD systems using early loading the output would look something like this:

On AMD systems using late loading the output will show the version of the old microcode before reloading the microcode and the new one once it is reloaded. It would look something like this:

Which CPUs accept microcode updates

Users may consult either Intel or AMD at the following links to see if a particular model is supported:

Detecting available microcode update

It is possible to find out if the intel-ucode.img contains a microcode image for the running CPU with iucode-tool .

1. Installintel-ucode (changing initrd is not required for detection)
2. Installiucode-tool
3. Load the cpuid kernel module:
4. Extract microcode image and search it for your cpuid:
5. If an update is available, it should show up below selected microcodes
6. The microcode might already be in your vendor bios and not show up loading in dmesg. Compare to the current microcode running grep microcode /proc/cpuinfo

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Linux processor microcode data file

mcu-administrator released this Nov 14, 2019

The following files have changed in microcode-20191113 since microcode-20191112:

New Platforms

Updated Platforms

Processor Model	Stepping	Family Code	Model Number	Stepping Id	Platform Id	Old Version	New Version	Products
CFL-S	P0	6	9e	c	22	000000a4	000000c6	Core Gen9 Desktop

Removed Platforms

NOTE: This microcode was previously incorrectly listed as both CFL-S (Desktop) and CFL-H (Mobile) and was removed from the 20191112 release. This processor is now correctly listed as CFL-S (Desktop) only.

For updated Specification Update documents, please visit Intel Resource & Design Center.

mcu-administrator released this Nov 12, 2019

The following files have changed in microcode-20191112 since microcode-20190918:

New Platforms

Processor Model	Stepping	Family Code	Model Number	Stepping Id	Platform Id	Old Version	New Version	Products
AVN	B0/C0	6	4d	8	01	0000012D	Atom C2xxx
CML-U62	A0	6	a6	0	80	000000c6	Core Gen10 Mobile
CNL-U	D0	6	66	3	80	0000002a	Core Gen8 Mobile
SKX-SP	B1	6	55	3	97	01000151	Xeon Scalable
GKL	B0	6	7a	1	01	00000032	Pentium J5005/N5000, Celeron J4005/J4105/N4000/N4100
GKL-R	R0	6	7a	8	01	00000016	Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120
ICL U/Y	D1	6	7e	5	80	00000046	Core Gen10 Mobile

Updated Platforms

Processor Model	Stepping	Family Code	Model Number	Stepping Id	Platform Id	Old Version	New Version	Products
SKL U/Y	D0	6	4e	3	c0	000000cc	000000d4	Core Gen6 Mobile
SKX-SP	H0/M0/U0	6	55	4	b7	02000064	00000065	Xeon Scalable
SKX-D	M1	6	55	4	b7	02000064	00000065	Xeon D-21xx
CLX-SP	B0	6	55	6	bf	0400002b	0400002c	Xeon Scalable Gen2
CLX-SP	B1	6	55	7	bf	0500002b	0500002c	Xeon Scalable Gen2
SKL H/S/E3	R0/N0	6	5e	3	36	000000cc	000000d4	Core Gen6
AML-Y22	H0	6	8e	9	10	000000b4	000000c6	Core Gen8 Mobile
KBL-U/Y	H0	6	8e	9	c0	000000b4	000000c6	Core Gen7 Mobile
CFL-U43e	D0	6	8e	a	c0	000000b4	000000c6	Core Gen8 Mobile
WHL-U	W0	6	8e	b	d0	000000b8	000000c6	Core Gen8 Mobile
AML-Y	V0	6	8e	c	94	000000b8	000000c6	Core Gen10 Mobile
CML-U42	V0	6	8e	c	94	000000b8	000000c6	Core Gen10 Mobile
WHL-U	V0	6	8e	c	94	000000b8	000000c6	Core Gen8 Mobile
KBL-G/X	H0	6	9e	9	2a	000000b4	000000c6	Core Gen7/Gen8
KBL-H/S/E3	B0	6	9e	9	2a	000000b4	000000c6	Core Gen7; Xeon E3 v6
CFL-H/S/E3	U0	6	9e	a	22	000000b4	000000c6	Core Gen8 Desktop, Mobile, Xeon E
CFL-S	B0	6	9e	b	02	000000b4	000000c6	Core Gen8
CFL-H	R0	6	9e	d	22	000000b8	000000c6	Core Gen9 Mobile

For updated Specification Update documents, please visit Intel Resource & Design Center.

mcu-administrator released this Sep 19, 2019

The following files have changed in microcode-20190918 since microcode-20190618:

Processor Model	Stepping	Family Code	Model Number	Stepping Id	Platform Id	Old Version	New Version	Products
BDW-U/Y	E0/F0	6	3d	4	c0	0000002d	0000002e	Core Gen5
HSX-EX	E0	6	3f	4	80	00000014	00000016	Xeon E7 v3
BDW-H/E3	E0/G0	6	47	1	22	00000020	00000021	Core Gen5
BDX-ML	B0/M0/R0	6	4f	1	ef	0b000036	0b000038	Xeon E5/E7 v4; Core i7-68xx/69xx
SKX-SP	H0/M0/U0	6	55	4	b7	0200005e	02000064	Xeon Scalable
SKX-D	M1	6	55	4	b7	0200005e	02000064	Xeon D-21xx
CLX-SP	B1	6	55	7	bf	05000021	0500002b	Xeon Scalable Gen2
BDX-DE	V1	6	56	2	10	0000001a	0000001c	Xeon D-1520/40
BDX-DE	V2/3	6	56	3	10	07000017	07000019	Xeon D-1518/19/21/27/28/31/33/37/41/48, Pentium D1507/08/09/17/19
BDX-DE	Y0	6	56	4	10	0f000015	0f000017	Xeon D-1557/59/67/71/77/81/87
BDX-NS	A0	6	56	5	10	0e00000d	0e00000f	Xeon D-1513N/23/33/43/53

For updated Specification Update documents, please visit Intel Resource & Design Center.

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